11 / Quantum computing
Quantum × AI: the microsecond model
An analysis of where AI and quantum computing actually meet today. Before a quantum computer can help AI, a small AI model has to keep it working, by reading error signals and choosing corrections in about a microsecond.
- Real time quantum error decoding
- Quantum computing and AI infrastructure
- September 2026
- Research and analysis

Context
Quantum computers started working once their errors could be corrected, and that moved the hard part to classical computers.
For most of the last decade, quantum chips were too noisy to do useful work. Each physical qubit loses its state quickly and every operation adds small errors. The known fix is error correction. You spread one reliable qubit, called a logical qubit, across many physical qubits, and keep checking them for signs of trouble.
The catch was that adding more qubits used to add more errors than it removed. In December 2024 Google showed the reverse on its Willow chip. As its code grew from distance 3 to 5 to 7, the logical error rate fell by 2.14 times at each step. The largest version used 101 physical qubits and made an error in 0.143% of cycles. Researchers call this working below threshold.
Once that line was crossed, the limit moved. Riverlane's 2025 industry report calls real time decoding a critical bottleneck and puts the target response under 1 µs. The popular story asks when quantum computers will speed up AI. What stands out to me is that the more urgent link runs the other way. AI models are now being built to keep quantum computers stable.
Analysis
Every microsecond the machine produces a puzzle, and it has to be solved before the next one arrives.
An error corrected qubit does not tell you what went wrong directly. It gives a pattern of check results, called a syndrome. On Willow a new syndrome arrives every 1.1 µs. A classical system, the decoder, has to read that pattern, infer which errors most likely caused it and decide the correction. If it falls behind, unprocessed data piles up and the computation stalls.
For years the trade off was stark. Fast decoders were less accurate, and accurate decoders were slow. Google DeepMind's first AlphaQubit, published in Nature in November 2024, beat existing decoders on accuracy. A later third party paper puts its speed at about 20 µs per round even on the smallest code, around 20 times too slow for a superconducting chip.
The decoder turns a stream of check results into a correction, often in two passes.
In a working system the loop runs continuously. Measurements come off the chip, control electronics package them, a fast link carries them to a processor, the decoder works out the fix and the controller applies it or simply records it for later. That last step matters because many corrections never need to be physically applied. Software can track them and adjust the final answer.
A common design splits decoding in two. A small neural network makes a fast first pass and clears most of the easy cases. A slower classical algorithm, such as matching or belief propagation, handles what is left. NVIDIA's decoding library takes this route. On the surface code at distance 13 it reports 2.1 to 2.3 µs per round, and cuts total decode time by 2.5 times compared with matching alone.
Google DeepMind went further with AlphaQubit 2, posted in December 2025. It reports near optimal accuracy with decoding under 1 µs per cycle on commercial accelerators, for the surface code up to distance 11 and the color code up to distance 9. These results come from realistic noise models rather than a live chip, and the paper is not yet peer reviewed.
- Qubits run cycle
- Syndromes read out
- FPGA streams data
- Link to accelerator
- Neural first pass
- Global decoder
- Correction fed back
The tools that exist today are specific, public and mostly very new.
- Neural pre decoder: NVIDIA's CUDA-Q QEC 0.6, from April 2026, ships convolutional models exported to ONNX and run in TensorRT at FP8 or FP16, plus the RelayBP decoder for qLDPC codes.
- Commercial error corrected system: Quantinuum's Helios, launched November 2025, has 98 physical qubits, 99.921% two qubit gate fidelity and 48 error corrected logical qubits, with a Python based language called Guppy.
- GPU decoding on real hardware: Quantinuum used an NVIDIA GPU decoder to react in 67 µs on Helios, inside a 2 ms budget, which NVIDIA calls the first real time use of a scalable qLDPC decoder.
- Full loop on open interfaces: Qblox and Riverlane closed a complete loop in September 2026 over QECi, an open interface, at 6.886 µs on a small code and 11.886 µs at distance 9.
- AI calibration model: NVIDIA Ising Calibration 1.5, from July 2026, is an open 31 billion parameter model that reads calibration plots and suggests how to tune a chip.
Under the hood it is a layered control stack, and the unusual part is that worst case speed matters more than average speed.
The stack has five layers. At the bottom sit the qubits. Readout hardware measures them. FPGA based control electronics, such as the Qblox Cluster, collect results and send pulses back. A link carries data to the decoder, either NVIDIA's NVQLink, which is rated at under 4 µs latency and 400 Gb/s, or the open QECi interface Riverlane uses. The decoder sits on top and returns a correction.
Two things make this unusual. First, a 2026 survey of real time error correction argues that the real constraints are round time, the slowest rounds and the full data path, not raw decoder speed. An average that looks fine still fails if the slow rounds miss the window. Second, the budget depends on the qubit type. Trapped ion machines like Helios allow about 2 ms. Superconducting chips like Willow allow about 1 µs, roughly 2,000 times less.
That is why the hardware contest is open, and why it is not only about AI. Quantinuum's 67 µs figure is a reaction time on a GPU. Qblox and Riverlane's figures are full round trips on FPGAs using classical algorithms. IonQ researchers decoded a simulated 408 logical qubit system on one Apple M4 Max laptop CPU, also without a neural network. Each measures something different, so they should not be ranked against each other. It is not settled that neural decoders win.
The teams building this share a habit of designing hardware, codes and software together.
- Design it all together: Riverlane's report argues that system performance needs hardware, software and algorithms designed as one, and the stacks above reflect that.
- Fast first, accurate second: splitting work between a quick approximate pass and a careful global pass is the common pattern across NVIDIA and others.
- Open interfaces: QECi is published as an open standard, and NVIDIA released the Ising calibration model with weights and data under an open license.
- Auditable automation: a June 2026 paper calibrated a 112 qubit chip with a language model agent that works from reusable, recorded steps, so experts can check each decision.
- Let the qubit set the budget: ion systems and superconducting systems get different decoders because their time budgets differ by three orders of magnitude.
The software stack is well documented, while some hardware details remain unconfirmed.
- Confirmed decoding tools: CUDA-Q and CUDA-Q QEC, TensorRT, ONNX, PyMatching and RelayBP, per NVIDIA's own documentation.
- Confirmed programming tools: Guppy and InQuanto on Quantinuum systems, and Deltaflow 2 with QECi from Riverlane.
- Confirmed links: NVIDIA NVQLink, integrated with Helios and adopted by more than a dozen supercomputing centers.
- AlphaQubit 2 hardware: the paper says commercial accelerators; the exact chips used are unconfirmed.
- IBM decoder hardware: IBM's roadmap describes real time decoding on conventional processors for Starling; the shipped design is unconfirmed.
The market is growing through shared infrastructure and cloud access rather than through end users.
Adoption so far is mostly by builders, not buyers. NVIDIA launched NVQLink in October 2025 with 17 quantum hardware builders and nine US national labs. By November 2025 more than a dozen supercomputing centers across the US, Europe and Asia had adopted it. Riverlane pushes the other way, with QECi as an open interface any control vendor can implement.
Hardware reaches users through clouds. Helios launched with Amgen, BMW Group, JPMorganChase and SoftBank among its customers, through Quantinuum's own cloud and on premises. Amazon Braket lists six QPU families from AQT, IonQ, IQM, QuEra and Rigetti. It charges $0.30 per task plus a per shot fee, for example $0.08 per shot on IonQ Forte. Braket does not publish latency or queue figures, so there is no honest number yet for how fast a SaaS product could get a result back.
For SaaS and product teams, the near term value is narrow and the big shifts depend on fault tolerance.
Realistic uses first. The strongest case is simulating molecules and materials, because nature is itself quantum. In October 2025 Google reported a verifiable result on Willow that ran about 13,000 times faster than the best known classical method, on one physics task. Optimization is much weaker. A March 2026 benchmark found that a strong classical method and a GPU solver matched or beat the hybrid quantum solver tested.
What quantum plus AI could unlock is mostly about data and tuning. Quantinuum, NVIDIA and a drug company showed in July 2026 that an AI model can design circuits for a drug molecule that then ran on Helios. That model was trained on simulated quantum data, not data from the machine. AI already helps run the machines. A language model agent calibrated 108 of 112 qubits in 4.7 hours, about 4 to 5 times faster than manual work.
- Near term, now: quantum safe encryption migration tooling. NIST published its first post quantum standards in August 2024, and a draft NIST plan phases out RSA and elliptic curve methods from 2030 and disallows them by 2035. This demand exists today, whatever the hardware timeline.
- Near term, experimental: materials and drug discovery platforms that call QPUs through Braket, Azure Quantum or IBM for small simulations inside hybrid AI workflows. The value is research and learning, not a production advantage.
- Speculative, 2029 or later: AI models trained on data that only a quantum computer can produce. This needs fault tolerant machines that go beyond what classical simulation can do, which current roadmaps place at 2029 to 2030.
- Speculative: logistics and scheduling optimization with hybrid quantum solvers. Current benchmarks do not show an advantage over classical GPU methods, so I would not plan a product around it.
Sources
- Nature, Dec 2024: Willow below threshold, 1.1 µs cycle, 2.14 suppression, 0.143% error, 101 qubits
- The Quantum Insider, Nov 2025: Riverlane report, decoding a critical bottleneck, under 1 µs target, co design
- arXiv, Jan 2026: first AlphaQubit takes about 20 µs per round
- arXiv (Google DeepMind and Google Quantum AI), Dec 2025: AlphaQubit 2 under 1 µs per cycle, distances 11 and 9
- NVIDIA, Apr 2026: CUDA-Q QEC 0.6, neural pre decoder at 2.1 to 2.3 µs, 2.5 times faster, RelayBP
- NVIDIA Newsroom, Nov 2025: Quantinuum 67 µs vs 2 ms, NVQLink latency and bandwidth, supercomputing center adoption
- NVIDIA Newsroom, Oct 2025: NVQLink launch with 17 quantum builders and nine national labs
- Quantinuum, Nov 2025: Helios specs, 48 logical qubits, fidelities, customers, Guppy
- Quantinuum, Mar 2026: GPU decoding on Helios with NVIDIA
- Qblox, Sep 2026: full loop at 6.886 µs and 11.886 µs over QECi, 20 µs target
- PostQuantum, Sep 2026: IonQ decodes 408 simulated logical qubits on one CPU
- arXiv, May 2026: real time error correction stack, slow rounds and data path as constraints
- NVIDIA Developer, Jul 2026: Ising Calibration 1.5, open 31 billion parameter model
- arXiv, Jun 2026: agent calibrates 108 of 112 qubits in 4.7 hours, 4 to 5 times faster
- IBM Newsroom, Jun 2025: Starling in 2029 with 200 logical qubits, about 90% less overhead, real time decoding
- Quantinuum, 2024: roadmap to full fault tolerance by 2030
- Amazon Web Services, Sep 2026: Braket QPU list and per task and per shot pricing
- Google Research, Oct 2025: Quantum Echoes, verifiable result about 13,000 times faster
- arXiv, Mar 2026: optimization benchmark, classical solvers match or beat hybrid quantum solver
- Quantinuum, Jul 2026: AI designed circuits for imipramine, trained on simulated quantum data, run on Helios
- NIST, Nov 2024: draft IR 8547, RSA and elliptic curve phase out 2030, disallowed 2035
Metrics
- 1.1 µsError correction cycle on WillowGoogle's Willow chip completes one round of error checks every 1.1 µs, which sets the pace a decoder must keep.
- Down from
20 µs<1 µsNeural decode time per roundThe first AlphaQubit took about 20 µs per round, as measured in a third party paper; AlphaQubit 2 reports under 1 µs in simulation, not yet peer reviewed. - 2.1 µsGPU neural pre decoder per roundNVIDIA reports 2.1 µs per round for its fast model on the surface code at distance 13, cutting total decode time 2.5 times.
- 67 µsGPU decoder reaction on HeliosQuantinuum's GPU decoder reacted in 67 µs against a 2 ms budget, a margin of 32 times, as reported by NVIDIA.
- 11.9 µsFull correction loop at distance 9Qblox and Riverlane measured the complete loop from readout to applied fix at 11.886 µs, within a 20 µs target.
- 0.143%Logical error per cycle on WillowWillow's distance 7 code made an error in 0.143% of cycles, and errors fell by 2.14 times each time the code grew.
- 101Physical qubits for one logical qubitWillow's distance 7 surface code used 101 physical qubits to hold one protected qubit; IBM says its codes cut this overhead by about 90%.
- 48Error corrected logical qubits on HeliosQuantinuum reports 48 error corrected logical qubits from 98 physical qubits on its commercial Helios system.
- ~2030Fault tolerance reachable through cloud APIsEstimate: IBM plans Starling with 200 logical qubits for 2029 and Quantinuum targets full fault tolerance by 2030, and cloud access usually trails delivery.
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